1. Field of the Invention
The present invention relates to an integrated circuit, and more particularly, to an integrated circuit that includes a reference current generating circuit for generating a digitally calibrated reference current and a reference voltage generating circuit having an on-chip reference voltage driving circuit, which minimizes power consumption and a chip area.
2. Description of the Related Art
In general, reference current and voltage generating circuits are capable of generating a steady reference current and voltage, regardless of or independently of a change in temperature and/or supply voltage.
Reference current and voltage generating circuits are useful with analog signal processing apparatuses or systems having a data converter, a memory, a highly sensitive sensor and the like. The reference voltage generating circuit includes a voltage driving circuit for driving a reference voltage with a data converter connected to an output terminal of the reference voltage generating circuit.
The reference current and voltage generating circuits can generate a predetermined current and/or voltage with a small amount of power for a long time, irrespective of a change in the supply voltage and/or ambient temperature. Accordingly, these circuits are useful with analog signal processing systems.
Further, the higher the resolution of a high-speed, high-resolution analog-to-digital (A/D) converter or digital-to-analog (D/A) converter, the more exact the reference current and voltage are required to be, regardless of changes in the power source and/or temperature.
An integrated circuit, which has reference current and voltage generating circuits that are manufactured using a complementary metal-oxide semiconductor (CMOS) process, may generate a reference current that is not the same as a desired reference current. This is due to a change in manufacturing process parameters during a manufacturing process. That is, there is an offset between an actual reference current generated by the reference current generating circuit, and a desired reference current.
Conventionally, such an offset is removed by connecting a resistor to the outside of the integrated circuit. However, this method fails to completely remove the offset. Further, noise from the outside may enter the integrated circuit via a pin of the integrated circuit to which the resistor is connected, thereby causing malfunction of the integrated circuit.
In the event that a CMOS switched capacitor is connected to an output terminal of the voltage driving circuit (or an output terminal of the reference voltage generating circuit), glitch energy is generated at an output node of the reference driving circuit when turning the CMOS switched capacitor on and off. As a result, high-frequency noise is generated.
The high-frequency noise is removed using a capacitor of a large capacity, e.g., a capacitor of 0.5 nF or more, or a voltage driving circuit that operates at a high speed comparable to the whole system of the integrated circuit while connecting a large-capacity capacitor to the outside of the integrated circuit.
However, the integration of a capacitor of a large capacity into an integrated circuit increases the size of the integrated circuit considerably. In addition, the use of a voltage driving circuit having a similar operational speed to that of the whole system increases the power consumption of the voltage driving circuit and the integrated circuit.